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refactor: Move drivers into properly module.

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* Align our driver module layout to properly match Zephyr conventions,
  allowing proper CMake setup to amend the library for each type of driver.
This commit is contained in:
Peter Johanson
2023-09-02 20:07:31 -07:00
committed by Pete Johanson
parent eaeea4bdfa
commit 690bc1bb44
55 changed files with 53 additions and 39 deletions
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7
app/module/drivers/gpio/CMakeLists.txt Normal file
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# Copyright (c) 2022 The ZMK Contributors
# SPDX-License-Identifier: MIT
zephyr_library_amend()
zephyr_library_sources_ifdef(CONFIG_GPIO_595 gpio_595.c)
zephyr_library_sources_ifdef(CONFIG_GPIO_MAX7318 gpio_max7318.c)

7
app/module/drivers/gpio/Kconfig Normal file
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if GPIO
rsource "Kconfig.max7318"
rsource "Kconfig.595"
endif # GPIO

24
app/module/drivers/gpio/Kconfig.595 Normal file
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# 595 GPIO configuration options
# Copyright (c) 2022 The ZMK Contributors
# SPDX-License-Identifier: MIT
DT_COMPAT_ZMK_GPIO_595 := zmk,gpio-595
menuconfig GPIO_595
bool "595 Shift Register SPI driver"
default $(dt_compat_enabled,$(DT_COMPAT_ZMK_GPIO_595))
depends on SPI
select HAS_DTS_GPIO
help
Enable driver for 595 shift register chip using SPI.
if GPIO_595
config GPIO_595_INIT_PRIORITY
int "Init priority"
default 75
help
Device driver initialization priority.
endif #GPIO_595

24
app/module/drivers/gpio/Kconfig.max7318 Normal file
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# MAX7318 GPIO configuration options
# Copyright (c) 2022 The ZMK Contributors
# SPDX-License-Identifier: MIT
DT_COMPAT_MAXIM_MAX7318 := maxim,max7318
menuconfig GPIO_MAX7318
bool "MAX7318 I2C-based GPIO chip"
default $(dt_compat_enabled,$(DT_COMPAT_MAXIM_MAX7318))
depends on I2C
select HAS_DTS_GPIO
help
Enable driver for MAX7318 I2C-based GPIO chip.
if GPIO_MAX7318
config GPIO_MAX7318_INIT_PRIORITY
int "Init priority"
default 75
help
Device driver initialization priority.
endif #GPIO_MAX7318

215
app/module/drivers/gpio/gpio_595.c Normal file
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/*
* Copyright (c) 2022 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
#define DT_DRV_COMPAT zmk_gpio_595
/**
* @file Driver for 595 SPI-based GPIO driver.
*/
#include <errno.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>
#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(gpio_595);
/** Configuration data */
struct reg_595_config {
/* gpio_driver_data needs to be first */
struct gpio_driver_config common;
struct spi_dt_spec bus;
uint8_t ngpios;
};
/** Runtime driver data */
struct reg_595_drv_data {
/* gpio_driver_data needs to be first */
struct gpio_driver_config data;
struct k_sem lock;
uint32_t gpio_cache;
};
static int reg_595_write_registers(const struct device *dev, uint32_t value) {
const struct reg_595_config *config = dev->config;
struct reg_595_drv_data *const drv_data = (struct reg_595_drv_data *const)dev->data;
int ret = 0;
uint8_t nwrite = config->ngpios / 8;
uint32_t reg_data = sys_cpu_to_be32(value);
/* Allow a sequence of 1-4 registers in sequence, lowest byte is for the first in the chain */
const struct spi_buf tx_buf[1] = {{
.buf = ((uint8_t *)&reg_data) + (4 - nwrite),
.len = nwrite,
}};
const struct spi_buf_set tx = {
.buffers = tx_buf,
.count = ARRAY_SIZE(tx_buf),
};
ret = spi_write_dt(&config->bus, &tx);
if (ret < 0) {
LOG_ERR("spi_write FAIL %d\n", ret);
return ret;
}
drv_data->gpio_cache = value;
return 0;
}
/**
* @brief Setup the pin direction (input or output)
*
* @param dev Device struct of the 595
* @param pin The pin number
* @param flags Flags of pin or port
*
* @return 0 if successful, failed otherwise
*/
static int setup_pin_dir(const struct device *dev, uint32_t pin, int flags) {
if ((flags & GPIO_OUTPUT) == 0U) {
return -ENOTSUP;
}
return 0;
}
static int reg_595_pin_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) {
int ret;
/* Can't do SPI bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
if ((flags & GPIO_OPEN_DRAIN) != 0U) {
return -ENOTSUP;
};
ret = setup_pin_dir(dev, pin, flags);
if (ret) {
LOG_ERR("595: error setting pin direction (%d)", ret);
}
return ret;
}
static int reg_595_port_get_raw(const struct device *dev, uint32_t *value) { return -ENOTSUP; }
static int reg_595_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) {
struct reg_595_drv_data *const drv_data = (struct reg_595_drv_data *const)dev->data;
uint32_t buf;
int ret;
/* Can't do SPI bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
buf = drv_data->gpio_cache;
buf = (buf & ~mask) | (mask & value);
ret = reg_595_write_registers(dev, buf);
k_sem_give(&drv_data->lock);
return ret;
}
static int reg_595_port_set_bits_raw(const struct device *dev, uint32_t mask) {
return reg_595_port_set_masked_raw(dev, mask, mask);
}
static int reg_595_port_clear_bits_raw(const struct device *dev, uint32_t mask) {
return reg_595_port_set_masked_raw(dev, mask, 0);
}
static int reg_595_port_toggle_bits(const struct device *dev, uint32_t mask) {
struct reg_595_drv_data *const drv_data = (struct reg_595_drv_data *const)dev->data;
uint32_t buf;
int ret;
/* Can't do SPI bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
buf = drv_data->gpio_cache;
buf ^= mask;
ret = reg_595_write_registers(dev, buf);
k_sem_give(&drv_data->lock);
return ret;
}
static const struct gpio_driver_api api_table = {
.pin_configure = reg_595_pin_config,
.port_get_raw = reg_595_port_get_raw,
.port_set_masked_raw = reg_595_port_set_masked_raw,
.port_set_bits_raw = reg_595_port_set_bits_raw,
.port_clear_bits_raw = reg_595_port_clear_bits_raw,
.port_toggle_bits = reg_595_port_toggle_bits,
};
/**
* @brief Initialization function of 595
*
* @param dev Device struct
* @return 0 if successful, failed otherwise.
*/
static int reg_595_init(const struct device *dev) {
const struct reg_595_config *const config = dev->config;
struct reg_595_drv_data *const drv_data = (struct reg_595_drv_data *const)dev->data;
if (!device_is_ready(config->bus.bus)) {
LOG_ERR("Unable to get SPI bus device");
return -ENODEV;
}
k_sem_init(&drv_data->lock, 1, 1);
return 0;
}
#define GPIO_PORT_PIN_MASK_FROM_NGPIOS(ngpios) ((gpio_port_pins_t)(((uint64_t)1 << (ngpios)) - 1U))
#define GPIO_PORT_PIN_MASK_FROM_DT_INST(inst) \
GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(inst, ngpios))
#define REG_595_INIT(n) \
static struct reg_595_config reg_595_##n##_config = { \
.common = \
{ \
.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
}, \
.bus = \
SPI_DT_SPEC_INST_GET(n, SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(8), 0), \
.ngpios = DT_INST_PROP(n, ngpios), \
}; \
\
static struct reg_595_drv_data reg_595_##n##_drvdata = {}; \
\
/* This has to init after SPI master */ \
DEVICE_DT_INST_DEFINE(n, reg_595_init, NULL, &reg_595_##n##_drvdata, &reg_595_##n##_config, \
POST_KERNEL, CONFIG_GPIO_595_INIT_PRIORITY, &api_table);
DT_INST_FOREACH_STATUS_OKAY(REG_595_INIT)

341
app/module/drivers/gpio/gpio_max7318.c Normal file
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/*
* Copyright (c) 2022 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
#define DT_DRV_COMPAT maxim_max7318
/**
* @file Driver for MAX7318 I2C-based GPIO driver.
*/
#include <errno.h>
#include <kernel.h>
#include <device.h>
#include <init.h>
#include <sys/byteorder.h>
#include <drivers/gpio.h>
#include <drivers/i2c.h>
#include <drivers/ext_power.h>
#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(gpio_max7318);
// Register definitions
#define REG_INPUT_PORTA 0x00
#define REG_INPUT_PORTB 0x01
#define REG_OUTPUT_PORTA 0x02
#define REG_OUTPUT_PORTB 0x03
#define REG_IPOL_PORTA 0x04
#define REG_IPOL_PORTB 0x05
#define REG_CONFIG_PORTA 0x06
#define REG_CONFIG_PORTB 0x07
// Configuration data
struct max7318_config {
struct gpio_driver_config common;
struct i2c_dt_spec i2c_bus;
uint8_t ngpios;
};
// Runtime driver data
struct max7318_drv_data {
// gpio_driver_data needs to be first
struct gpio_driver_config data;
struct k_sem lock;
struct {
uint16_t ipol;
uint16_t config;
uint16_t output;
} reg_cache;
};
/**
* @brief Read the value of two consecutive registers
*
* Read two consecutive bytes from the register at address `reg` and `reg + 1`,
* typically reading from registers for port 0 and 1 simultaneously.
*
* @param dev The max7318 device.
* @param reg Register to read (the PORT0 of the pair of registers).
* @param buf Buffer to read data into.
*
* @return 0 if successful, failed otherwise.
*/
static int read_registers(const struct device *dev, uint8_t reg, uint16_t *buf) {
const struct max7318_config *config = dev->config;
uint8_t data[2] = {0};
int ret = i2c_burst_read_dt(&config->i2c_bus, reg, &data[0], sizeof(data));
if (ret) {
LOG_DBG("i2c_burst_read FAIL %d\n", ret);
return ret;
}
// the first register is data[0], the second one is data[1]
// since we only ever read the PORTA registers here, it's effectively little endian.
*buf = sys_get_le16(data);
LOG_DBG("max7318: read: reg[0x%X] = 0x%X, reg[0x%X] = 0x%X", reg, data[0], (reg + 1), data[1]);
return 0;
}
/**
* @brief Write the value of two consecutive registers
*
* Write two consecutive bytes from the register at address `reg` and `reg + 1`,
* typically to registers for port 0 and 1 simultaneously.
*
* @param dev The max7318 device.
* @param reg Register to write (usually the register for PORT0).
* @param value The value to write
*
* @return 0 if successful, failed otherwise.
*/
static int write_registers(const struct device *dev, uint8_t reg, uint16_t value) {
const struct max7318_config *config = dev->config;
LOG_DBG("max7318: write: reg[0x%X] = 0x%X, reg[0x%X] = 0x%X", reg, (value & 0xFF), (reg + 1),
(value >> 8));
uint8_t data[2] = {0};
// bits 0..7 are port A, 8..15 are port B, so we should write bits 0..7 first
// -- ie. this is little endian also.
sys_put_le16(value, &data[0]);
return i2c_burst_write_dt(&config->i2c_bus, reg, &data[0], sizeof(data));
}
/**
* @brief Setup the pin direction (input or output)
*
* @param dev The max7318 device.
* @param pin The pin number.
* @param flags Flags of pin or port.
*
* @return 0 if successful, failed otherwise
*/
static int set_pin_direction(const struct device *dev, uint32_t pin, int flags) {
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
uint16_t *dir = &drv_data->reg_cache.config;
uint16_t *output = &drv_data->reg_cache.output;
/*
The output register is 1=high, 0=low; the direction (config) register
is 1=input, 0=output.
*/
if ((flags & GPIO_OUTPUT) != 0U) {
if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
*output |= BIT(pin);
} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
*output &= ~BIT(pin);
}
*dir &= ~BIT(pin);
} else {
*dir |= BIT(pin);
}
int ret = write_registers(dev, REG_OUTPUT_PORTA, *output);
if (ret != 0) {
return ret;
}
return write_registers(dev, REG_CONFIG_PORTA, *dir);
}
/**
* @brief Setup the pin pull up/pull down status. This function doesn't actually set any
* registers, since the max7318 only supports a pullup, and it can't be controlled.
*
* @param dev The max7318 device.
* @param pin The pin number
* @param flags Flags of pin or port
*
* @return 0 if successful, failed otherwise
*/
static int set_pin_pull_direction(const struct device *dev, uint32_t pin, int flags) {
// actually, this chip only supports pull-up, and it can't be disabled.
// so, if we try to set anything else, return enotsup; we don't actually
// need to set any registers.
if ((flags & GPIO_PULL_DOWN) != 0U) {
return -ENOTSUP;
}
return 0;
}
static int max7318_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) {
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
/* Can't do I2C bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
int ret = 0;
if ((flags & GPIO_OPEN_DRAIN) != 0U) {
ret = -ENOTSUP;
goto done;
};
ret = set_pin_direction(dev, pin, flags);
if (ret != 0) {
LOG_ERR("error setting pin direction (%d)", ret);
goto done;
}
ret = set_pin_pull_direction(dev, pin, flags);
if (ret != 0) {
LOG_ERR("error setting pin pull up/down (%d)", ret);
goto done;
}
done:
k_sem_give(&drv_data->lock);
return ret;
}
static int max7318_port_get_raw(const struct device *dev, uint32_t *value) {
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
/* Can't do I2C bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
uint16_t buf = 0;
int ret = read_registers(dev, REG_INPUT_PORTA, &buf);
if (ret != 0) {
goto done;
}
*value = buf;
done:
k_sem_give(&drv_data->lock);
return ret;
}
static int max7318_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) {
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
/* Can't do I2C bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
uint16_t buf = drv_data->reg_cache.output;
buf = (buf & ~mask) | (mask & value);
int ret = write_registers(dev, REG_OUTPUT_PORTA, buf);
if (ret == 0) {
drv_data->reg_cache.output = buf;
}
k_sem_give(&drv_data->lock);
return ret;
}
static int max7318_port_set_bits_raw(const struct device *dev, uint32_t mask) {
return max7318_port_set_masked_raw(dev, mask, mask);
}
static int max7318_port_clear_bits_raw(const struct device *dev, uint32_t mask) {
return max7318_port_set_masked_raw(dev, mask, 0);
}
static int max7318_port_toggle_bits(const struct device *dev, uint32_t mask) {
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
/* Can't do I2C bus operations from an ISR */
if (k_is_in_isr()) {
return -EWOULDBLOCK;
}
k_sem_take(&drv_data->lock, K_FOREVER);
uint16_t buf = drv_data->reg_cache.output;
buf ^= mask;
int ret = write_registers(dev, REG_OUTPUT_PORTA, buf);
if (ret == 0) {
drv_data->reg_cache.output = buf;
}
k_sem_give(&drv_data->lock);
return ret;
}
static int max7318_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
enum gpio_int_mode mode, enum gpio_int_trig trig) {
return -ENOTSUP;
}
static const struct gpio_driver_api api_table = {
.pin_configure = max7318_config,
.port_get_raw = max7318_port_get_raw,
.port_set_masked_raw = max7318_port_set_masked_raw,
.port_set_bits_raw = max7318_port_set_bits_raw,
.port_clear_bits_raw = max7318_port_clear_bits_raw,
.port_toggle_bits = max7318_port_toggle_bits,
.pin_interrupt_configure = max7318_pin_interrupt_configure,
};
/**
* @brief Initialisation function of MAX7318
*
* @param dev Device struct
* @return 0 if successful, failed otherwise.
*/
static int max7318_init(const struct device *dev) {
const struct max7318_config *const config = dev->config;
struct max7318_drv_data *const drv_data = (struct max7318_drv_data *const)dev->data;
if (!device_is_ready(config->i2c_bus.bus)) {
LOG_WRN("i2c bus not ready!");
return -EINVAL;
}
LOG_INF("device initialised at 0x%x", config->i2c_bus.addr);
k_sem_init(&drv_data->lock, 1, 1);
return 0;
}
#define GPIO_PORT_PIN_MASK_FROM_NGPIOS(ngpios) ((gpio_port_pins_t)(((uint64_t)1 << (ngpios)) - 1U))
#define GPIO_PORT_PIN_MASK_FROM_DT_INST(inst) \
GPIO_PORT_PIN_MASK_FROM_NGPIOS(DT_INST_PROP(inst, ngpios))
#define MAX7318_INIT(inst) \
static struct max7318_config max7318_##inst##_config = { \
.common = {.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst)}, \
.i2c_bus = I2C_DT_SPEC_INST_GET(inst)}; \
\
static struct max7318_drv_data max7318_##inst##_drvdata = { \
/* Default for registers according to datasheet */ \
.reg_cache.ipol = 0x0, \
.reg_cache.config = 0xFFFF, \
.reg_cache.output = 0xFFFF, \
}; \
\
DEVICE_DT_INST_DEFINE(inst, max7318_init, NULL, &max7318_##inst##_drvdata, \
&max7318_##inst##_config, POST_KERNEL, \
CONFIG_GPIO_MAX7318_INIT_PRIORITY, &api_table);
DT_INST_FOREACH_STATUS_OKAY(MAX7318_INIT)