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Merge remote-tracking branch 'upstream/main' into bluetooth/battery-reporting

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This commit is contained in:
Nick
2020-09-19 19:15:05 -05:00
parent 844f2c7674 c0806d27f1
commit da0fb965f6
132 changed files with 3192 additions and 2651 deletions
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2
app/boards/arm/dz60rgb/Kconfig.board
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@@ -1,4 +1,4 @@
# Copyright (c) 2020 Nick Winans
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config BOARD_DZ60RGB_REV1

2
app/boards/arm/dz60rgb/Kconfig.defconfig
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@@ -1,6 +1,6 @@
# DZ60RGB keyboard configuration
# Copyright (c) 2020 Nick Winans
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if BOARD_DZ60RGB_REV1

2
app/boards/arm/dz60rgb/dz60rgb_rev1.dts
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Nick Winans
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

54
app/boards/arm/dz60rgb/pinmux.c
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@@ -15,55 +15,53 @@
/* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
#endif
};
static int pinmux_stm32_init(struct device *port)
{
ARG_UNUSED(port);
static int pinmux_stm32_init(struct device *port) {
ARG_UNUSED(port);
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
return 0;
return 0;
}
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

2
app/boards/arm/nrfmicro/Kconfig.board
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@@ -1,6 +1,6 @@
# nrfmicro board configuration
# Copyright (c) 2020 Okke Formsma, joric
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config BOARD_NRFMICRO_11

2
app/boards/arm/nrfmicro/Kconfig.defconfig
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@@ -1,6 +1,6 @@
# Electronut Labs Papyr board configuration
# Copyright (c) 2020 Okke Formsma, joric
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if BOARD_NRFMICRO_11 || BOARD_NRFMICRO_11_FLIPPED || BOARD_NRFMICRO_13

2
app/boards/arm/nrfmicro/arduino_pro_micro_pins.dtsi
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

2
app/boards/arm/nrfmicro/arduino_pro_micro_pins_flipped.dtsi
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

2
app/boards/arm/nrfmicro/nrfmicro_11.dts
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

2
app/boards/arm/nrfmicro/nrfmicro_11_flipped.dts
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

2
app/boards/arm/nrfmicro/nrfmicro_13.dts
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

29
app/boards/arm/nrfmicro/pinmux.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020 Okke Formsma, joric
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
@@ -11,31 +11,30 @@
#include <sys/sys_io.h>
#include <devicetree.h>
static int pinmux_nrfmicro_init(struct device *port)
{
ARG_UNUSED(port);
static int pinmux_nrfmicro_init(struct device *port) {
ARG_UNUSED(port);
struct device *p1 = device_get_binding("GPIO_1");
struct device *p1 = device_get_binding("GPIO_1");
#if CONFIG_BOARD_NRFMICRO_13
struct device *p0 = device_get_binding("GPIO_0");
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
gpio_pin_set(p1, 9, 0);
struct device *p0 = device_get_binding("GPIO_0");
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
gpio_pin_set(p1, 9, 0);
#if CONFIG_BOARD_NRFMICRO_CHARGER
gpio_pin_configure(p0, 5, GPIO_OUTPUT);
gpio_pin_set(p0, 5, 0);
gpio_pin_configure(p0, 5, GPIO_OUTPUT);
gpio_pin_set(p0, 5, 0);
#else
gpio_pin_configure(p0, 5, GPIO_INPUT);
gpio_pin_configure(p0, 5, GPIO_INPUT);
#endif
#else
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
gpio_pin_set(p1, 9, 1);
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
gpio_pin_set(p1, 9, 1);
#endif
return 0;
return 0;
}
SYS_INIT(pinmux_nrfmicro_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY);

2
app/boards/arm/planck/Kconfig.board
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@@ -1,6 +1,6 @@
# Planck V6 board configuration
# Copyright (c) 2020 Peter Johanson
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config BOARD_PLANCK_REV6

2
app/boards/arm/planck/Kconfig.defconfig
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@@ -1,6 +1,6 @@
# Planck keyboard configuration
# Copyright (c) 2020 Peter Johanson
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if BOARD_PLANCK_REV6

52
app/boards/arm/planck/pinmux.c
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@@ -15,55 +15,53 @@
/* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_1
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
#endif /* CONFIG_UART_1 */
#ifdef CONFIG_UART_2
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_2 */
#ifdef CONFIG_I2C_1
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
#endif /* CONFIG_I2C_1 */
#ifdef CONFIG_I2C_2
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif /* CONFIG_I2C_2 */
#ifdef CONFIG_SPI_1
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif /* CONFIG_SPI_1 */
#ifdef CONFIG_SPI_2
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif /* CONFIG_SPI_2 */
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
#ifdef CONFIG_CAN_1
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
#endif /* CONFIG_CAN_1 */
};
static int pinmux_stm32_init(struct device *port)
{
ARG_UNUSED(port);
static int pinmux_stm32_init(struct device *port) {
ARG_UNUSED(port);
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
return 0;
return 0;
}
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

54
app/boards/arm/proton_c/pinmux.c
View File

@@ -15,55 +15,53 @@
/* pin assignments for STM32F3DISCOVERY board */
static const struct pin_config pinconf[] = {
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
#ifdef CONFIG_SPI_STM32_USE_HW_SS
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
#endif
#ifdef CONFIG_USB_DC_STM32
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
#endif /* CONFIG_USB_DC_STM32 */
#if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
#endif
};
static int pinmux_stm32_init(struct device *port)
{
ARG_UNUSED(port);
static int pinmux_stm32_init(struct device *port) {
ARG_UNUSED(port);
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
return 0;
return 0;
}
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

11
app/boards/shields/corne/corne.keymap
View File

@@ -1,5 +1,6 @@
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
/ {
keymap {
@@ -21,14 +22,14 @@
lower_layer {
// -----------------------------------------------------------------------------------------
// | ESC | 1 | 2 | 3 | 4 | 5 | | 6 | 7 | 8 | 9 | 0 | BKSP |
// | CTRL | | | | | | | LFT | DWN | UP | RGT | | |
// | BTCLR| BT1 | BT2 | BT3 | BT4 | BT5 | | LFT | DWN | UP | RGT | | |
// | SHFT | | | | | | | | | | | | |
// | GUI | | SPC | | ENT | | ALT |
bindings = <
&kp ESC &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp BKSP
&kp LCTL &trans &trans &trans &trans &trans &kp LARW &kp DARW &kp UARW &kp RARW &trans &trans
&kp LSFT &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&kp LGUI &trans &kp SPC &kp RET &trans &kp RALT
&kp ESC &kp NUM_1 &kp NUM_2 &kp NUM_3 &kp NUM_4 &kp NUM_5 &kp NUM_6 &kp NUM_7 &kp NUM_8 &kp NUM_9 &kp NUM_0 &kp BKSP
&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &kp LARW &kp DARW &kp UARW &kp RARW &trans &trans
&kp LSFT &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&kp LGUI &trans &kp SPC &kp RET &trans &kp RALT
>;
};

13
app/boards/shields/iris/iris.keymap
View File

@@ -3,6 +3,7 @@
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
/ {
keymap {
@@ -26,17 +27,17 @@
lower_layer {
// ------------------------------------------------------------------------------------------------------------
// | | | | | | | | | | | | | |
// | BTCLR | BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | |
// | F1 | F2 | F3 | F4 | F5 | F6 | | F7 | F8 | F9 | F10 | F11 | F12 |
// | ` | ! | @ | # | $ | % | | ^ | & | * | ( | ) | ~ |
// | | | | | | | | | | | _ | + | { | } | "|" |
// | | | | | | | |
bindings = <
&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12
&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD
&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE
&trans &trans &trans &trans &trans &trans
&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans
&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12
&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD
&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE
&trans &trans &trans &trans &trans &trans
>;
};

13
app/boards/shields/lily58/lily58.keymap
View File

@@ -1,5 +1,6 @@
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
/ {
keymap {
@@ -25,17 +26,17 @@
lower_layer {
// ------------------------------------------------------------------------------------------------------------
// | | | | | | | | | | | | | |
// | BTCLR | BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | |
// | F1 | F2 | F3 | F4 | F5 | F6 | | F7 | F8 | F9 | F10 | F11 | F12 |
// | ` | ! | @ | # | $ | % | | ^ | & | * | ( | ) | ~ |
// | | | | | | | | | | | _ | + | { | } | "|" |
// | | | | | | | | | |
bindings = <
&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12
&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD
&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE
&trans &trans &trans &trans &trans &trans &trans &trans
&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans
&kp F1 &kp F2 &kp F3 &kp F4 &kp F5 &kp F6 &kp F7 &kp F8 &kp F9 &kp F10 &kp F11 &kp F12
&kp GRAV &kp BANG &kp ATSN &kp HASH &kp CURU &kp PRCT &kp CRRT &kp AMPS &kp KMLT &kp LPRN &kp RPRN &kp TILD
&trans &trans &trans &trans &trans &trans &trans &trans &trans &kp MINUS &kp KPLS &kp LCUR &kp RCUR &kp PIPE
&trans &trans &trans &trans &trans &trans &trans &trans
>;
sensor-bindings = <&inc_dec_cp M_VOLU M_VOLD>;

4
app/boards/shields/qaz/Kconfig.defconfig
View File

@@ -1,5 +1,5 @@
# Copyright (c) 2020 TJ Campie
# SPDX-License-Identifier: MIT
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if SHIELD_QAZ

8
app/boards/shields/qaz/Kconfig.shield
View File

@@ -1,5 +1,5 @@
# Copyright (c) 2020 TJ Campie
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config SHIELD_MY_BOARD
def_bool $(shields_list_contains,qaz)
config SHIELD_QAZ
def_bool $(shields_list_contains,qaz)

28
app/boards/shields/qaz/qaz.keymap
View File

@@ -1,16 +1,30 @@
/*
* Copyright (c) 2020 TJ Campie
*
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
#define DEFAULT 0
#define NUM_SYM 1
#define NAV 2
/ {
behaviors {
hm: homerow_mods {
compatible = "zmk,behavior-hold-tap";
label = "homerow mods";
#binding-cells = <2>;
tapping_term_ms = <225>;
flavor = "tap-preferred";
bindings = <&kp>, <&kp>;
};
};
};
/ {
keymap {
compatible = "zmk,keymap";
@@ -18,9 +32,9 @@
default_layer {
bindings = <
&kp Q &kp W &kp E &kp R &kp T &kp Y &kp U &kp I &kp O &kp P
&kp A &kp S &kp D &kp F &kp G &kp H &kp J &kp K &kp L &kp RET
&hm LGUI A &hm LALT S &hm LCTL D &hm LSFT F &kp G &kp H &hm RSFT J &hm RCTL K &hm RALT L &hm RGUI RET
&kp Z &kp X &kp C &kp V &kp B &kp N &kp M &kp CMMA &kp DOT
&kp LSFT &kp LGUI &kp LALT &mo NAV &kp SPC &mo NUM_SYM &kp QUOT &kp FSLH
&kp LSFT &kp LGUI &kp LALT &lt NAV RET &lt NUM_SYM SPC &kp COLN &kp QUOT &kp FSLH
>;
};
num_sym {
@@ -34,10 +48,10 @@
nav {
bindings = <
&none &none &none &none &none &none &none &kp UARW &none &kp BKSP
&bt BT_CLR &bt BT_NXT &bt BT_PRV &none &none &none &none &kp UARW &none &kp BKSP
&trans &trans &trans &trans &none &none &kp LARW &kp DARW &kp RARW &none
&none &none &none &none &none &none &none &none &none
&none &none &none &none &none &trans &trans &kp RET &trans &kp FSLH
&none &none &none &trans &trans &kp RET &trans &kp FSLH
>;
};
};

4
app/boards/shields/qaz/qaz.overlay
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2020 TJ Campie
*
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/

17
app/boards/shields/romac/romac.keymap
View File

@@ -6,6 +6,7 @@
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
/ {
keymap {
@@ -28,16 +29,16 @@
nav_layer {
// -----------------------
// | _ | HOME | PGUP |
// | _ | END | PGDN |
// | _ | _ | _ |
// | _ | _ | RET |
// | BTNXT | HOME | PGUP |
// | BTPRV | END | PGDN |
// | BTCLR | _ | _ |
// | _ | _ | RET |
// -----------------------
bindings = <
&trans &kp HOME &kp PGUP
&trans &kp END &kp PGDN
&trans &trans &trans
&trans &trans &kp RET
&bt BT_NXT &kp HOME &kp PGUP
&bt BT_PRV &kp END &kp PGDN
&bt BT_CLR &trans &trans
&trans &trans &kp RET
>;
};
};

10
app/boards/shields/settings_reset/Kconfig.defconfig Normal file
View File

@@ -0,0 +1,10 @@
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
if SHIELD_SETTINGS_RESET
config ZMK_KEYBOARD_NAME
default "SETTINGS RESET"
endif

5
app/boards/shields/settings_reset/Kconfig.shield Normal file
View File

@@ -0,0 +1,5 @@
# Copyright (c) 2020 The ZMK Contributors
# SPDX-License-Identifier: MIT
config SHIELD_SETTINGS_RESET
def_bool $(shields_list_contains,settings_reset)

1
app/boards/shields/settings_reset/settings_reset.conf Normal file
View File

@@ -0,0 +1 @@
CONFIG_ZMK_BLE_CLEAR_BONDS_ON_START=y

22
app/boards/shields/settings_reset/settings_reset.keymap Normal file
View File

@@ -0,0 +1,22 @@
/*
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
/ {
keymap {
compatible = "zmk,keymap";
default_layer {
bindings = <
&reset
>;
};
};
};

24
app/boards/shields/settings_reset/settings_reset.overlay Normal file
View File

@@ -0,0 +1,24 @@
/*
* Copyright (c) 2020 The ZMK Contributors
*
* SPDX-License-Identifier: MIT
*/
#include <dt-bindings/zmk/matrix-transform.h>
/ {
chosen {
zmk,kscan = &kscan0;
};
kscan0: kscan {
compatible = "zmk,kscan-gpio-direct";
label = "KSCAN";
input-gpios
= <&pro_micro_d 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>
;
};
};

13
app/boards/shields/sofle/sofle.keymap
View File

@@ -1,5 +1,6 @@
#include <behaviors.dtsi>
#include <dt-bindings/zmk/keys.h>
#include <dt-bindings/zmk/bt.h>
/ {
keymap {
@@ -44,17 +45,17 @@
raise_layer {
// ------------------------------------------------------------------------------------------------------------
// | | | | | | | | | | | | | |
// |BTCLR| BT1 | BT2 | BT3 | BT4 | BT5 | | | | | | | |
// | | INS | PSCR | GUI | | | | PGUP | | ^ | | | |
// | | ALT | CTRL | SHIFT | | CAPS | | PGDN | <- | v | -> | DEL | BKSPC |
// | | UNDO | CUT | COPY | PASTE | | | | | | | | | | |
// | | | | | | | | | | | |
bindings = <
&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&trans &kp INS &kp PRSC &kp GUI &trans &trans &kp PGUP &trans &kp UARW &trans &kp NUM_0 &trans
&trans &kp LALT &kp LCTL &kp LSFT &trans &kp CLCK &kp PGDN &kp LARW &kp DARW &kp RARW &kp DEL &kp BKSP
&trans &kp UNDO &kp CUT &kp COPY &kp PSTE &trans &trans &trans &trans &trans &trans &trans &trans &trans
&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
&bt BT_CLR &bt BT_SEL 0 &bt BT_SEL 1 &bt BT_SEL 2 &bt BT_SEL 3 &bt BT_SEL 4 &trans &trans &trans &trans &trans &trans
&trans &kp INS &kp PRSC &kp GUI &trans &trans &kp PGUP &trans &kp UARW &trans &kp NUM_0 &trans
&trans &kp LALT &kp LCTL &kp LSFT &trans &kp CLCK &kp PGDN &kp LARW &kp DARW &kp RARW &kp DEL &kp BKSP
&trans &kp UNDO &kp CUT &kp COPY &kp PSTE &trans &trans &trans &trans &trans &trans &trans &trans &trans
&trans &trans &trans &trans &trans &trans &trans &trans &trans &trans
>;
sensor-bindings = <&inc_dec_cp M_VOLU M_VOLD &inc_dec_kp PGUP PGDN>;