forked from kofal.net/zmk
Merge remote-tracking branch 'upstream/main' into bluetooth/battery-reporting
This commit is contained in:
@@ -1,4 +1,4 @@
|
||||
# Copyright (c) 2020 Nick Winans
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
config BOARD_DZ60RGB_REV1
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# DZ60RGB keyboard configuration
|
||||
|
||||
# Copyright (c) 2020 Nick Winans
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
if BOARD_DZ60RGB_REV1
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Nick Winans
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -15,55 +15,53 @@
|
||||
/* pin assignments for STM32F3DISCOVERY board */
|
||||
static const struct pin_config pinconf[] = {
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
#endif
|
||||
#ifdef CONFIG_USB_DC_STM32
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
#endif /* CONFIG_USB_DC_STM32 */
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
#endif /* CONFIG_USB_DC_STM32 */
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
#endif
|
||||
};
|
||||
|
||||
static int pinmux_stm32_init(struct device *port)
|
||||
{
|
||||
ARG_UNUSED(port);
|
||||
static int pinmux_stm32_init(struct device *port) {
|
||||
ARG_UNUSED(port);
|
||||
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
|
||||
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
@@ -1,6 +1,6 @@
|
||||
# nrfmicro board configuration
|
||||
|
||||
# Copyright (c) 2020 Okke Formsma, joric
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
config BOARD_NRFMICRO_11
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# Electronut Labs Papyr board configuration
|
||||
|
||||
# Copyright (c) 2020 Okke Formsma, joric
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
if BOARD_NRFMICRO_11 || BOARD_NRFMICRO_11_FLIPPED || BOARD_NRFMICRO_13
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2020 Okke Formsma, joric
|
||||
* Copyright (c) 2020 The ZMK Contributors
|
||||
*
|
||||
* SPDX-License-Identifier: MIT
|
||||
*/
|
||||
@@ -11,31 +11,30 @@
|
||||
#include <sys/sys_io.h>
|
||||
#include <devicetree.h>
|
||||
|
||||
static int pinmux_nrfmicro_init(struct device *port)
|
||||
{
|
||||
ARG_UNUSED(port);
|
||||
static int pinmux_nrfmicro_init(struct device *port) {
|
||||
ARG_UNUSED(port);
|
||||
|
||||
struct device *p1 = device_get_binding("GPIO_1");
|
||||
struct device *p1 = device_get_binding("GPIO_1");
|
||||
|
||||
#if CONFIG_BOARD_NRFMICRO_13
|
||||
struct device *p0 = device_get_binding("GPIO_0");
|
||||
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
|
||||
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
|
||||
gpio_pin_set(p1, 9, 0);
|
||||
struct device *p0 = device_get_binding("GPIO_0");
|
||||
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
|
||||
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
|
||||
gpio_pin_set(p1, 9, 0);
|
||||
|
||||
#if CONFIG_BOARD_NRFMICRO_CHARGER
|
||||
gpio_pin_configure(p0, 5, GPIO_OUTPUT);
|
||||
gpio_pin_set(p0, 5, 0);
|
||||
gpio_pin_configure(p0, 5, GPIO_OUTPUT);
|
||||
gpio_pin_set(p0, 5, 0);
|
||||
#else
|
||||
gpio_pin_configure(p0, 5, GPIO_INPUT);
|
||||
gpio_pin_configure(p0, 5, GPIO_INPUT);
|
||||
#endif
|
||||
|
||||
#else
|
||||
// enable EXT_VCC (use 0 for nRFMicro 1.3, use 1 for nRFMicro 1.1)
|
||||
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
|
||||
gpio_pin_set(p1, 9, 1);
|
||||
gpio_pin_configure(p1, 9, GPIO_OUTPUT);
|
||||
gpio_pin_set(p1, 9, 1);
|
||||
#endif
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(pinmux_nrfmicro_init, APPLICATION, CONFIG_APPLICATION_INIT_PRIORITY);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# Planck V6 board configuration
|
||||
|
||||
# Copyright (c) 2020 Peter Johanson
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
config BOARD_PLANCK_REV6
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
# Planck keyboard configuration
|
||||
|
||||
# Copyright (c) 2020 Peter Johanson
|
||||
# Copyright (c) 2020 The ZMK Contributors
|
||||
# SPDX-License-Identifier: MIT
|
||||
|
||||
if BOARD_PLANCK_REV6
|
||||
|
||||
@@ -15,55 +15,53 @@
|
||||
/* pin assignments for STM32F3DISCOVERY board */
|
||||
static const struct pin_config pinconf[] = {
|
||||
#ifdef CONFIG_UART_1
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
#endif /* CONFIG_UART_1 */
|
||||
#ifdef CONFIG_UART_2
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
#endif /* CONFIG_UART_2 */
|
||||
#ifdef CONFIG_I2C_1
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
#endif /* CONFIG_I2C_1 */
|
||||
#ifdef CONFIG_I2C_2
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
#endif /* CONFIG_I2C_2 */
|
||||
#ifdef CONFIG_SPI_1
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
#endif /* CONFIG_SPI_1 */
|
||||
#ifdef CONFIG_SPI_2
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
#endif /* CONFIG_SPI_2 */
|
||||
#ifdef CONFIG_USB_DC_STM32
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
#endif /* CONFIG_USB_DC_STM32 */
|
||||
#ifdef CONFIG_CAN_1
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
#endif /* CONFIG_CAN_1 */
|
||||
};
|
||||
|
||||
static int pinmux_stm32_init(struct device *port)
|
||||
{
|
||||
ARG_UNUSED(port);
|
||||
static int pinmux_stm32_init(struct device *port) {
|
||||
ARG_UNUSED(port);
|
||||
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
|
||||
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
|
||||
@@ -15,55 +15,53 @@
|
||||
/* pin assignments for STM32F3DISCOVERY board */
|
||||
static const struct pin_config pinconf[] = {
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart1), okay) && CONFIG_SERIAL
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
{STM32_PIN_PC4, STM32F3_PINMUX_FUNC_PC4_USART1_TX},
|
||||
{STM32_PIN_PC5, STM32F3_PINMUX_FUNC_PC5_USART1_RX},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(usart2), okay) && CONFIG_SERIAL
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
{STM32_PIN_PA2, STM32F3_PINMUX_FUNC_PA2_USART2_TX},
|
||||
{STM32_PIN_PA3, STM32F3_PINMUX_FUNC_PA3_USART2_RX},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c1), okay) && CONFIG_I2C
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
{STM32_PIN_PB6, STM32F3_PINMUX_FUNC_PB6_I2C1_SCL},
|
||||
{STM32_PIN_PB7, STM32F3_PINMUX_FUNC_PB7_I2C1_SDA},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2c2), okay) && CONFIG_I2C
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
{STM32_PIN_PA9, STM32F3_PINMUX_FUNC_PA9_I2C2_SCL},
|
||||
{STM32_PIN_PA10, STM32F3_PINMUX_FUNC_PA10_I2C2_SDA},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi1), okay) && CONFIG_SPI
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
{STM32_PIN_PA4, STM32F3_PINMUX_FUNC_PA4_SPI1_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
{STM32_PIN_PA5, STM32F3_PINMUX_FUNC_PA5_SPI1_SCK},
|
||||
{STM32_PIN_PA6, STM32F3_PINMUX_FUNC_PA6_SPI1_MISO},
|
||||
{STM32_PIN_PA7, STM32F3_PINMUX_FUNC_PA7_SPI1_MOSI},
|
||||
#endif
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi2), okay) && CONFIG_SPI
|
||||
#ifdef CONFIG_SPI_STM32_USE_HW_SS
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
{STM32_PIN_PB12, STM32F3_PINMUX_FUNC_PB12_SPI2_NSS},
|
||||
#endif /* CONFIG_SPI_STM32_USE_HW_SS */
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
{STM32_PIN_PB13, STM32F3_PINMUX_FUNC_PB13_SPI2_SCK},
|
||||
{STM32_PIN_PB14, STM32F3_PINMUX_FUNC_PB14_SPI2_MISO},
|
||||
{STM32_PIN_PB15, STM32F3_PINMUX_FUNC_PB15_SPI2_MOSI},
|
||||
#endif
|
||||
#ifdef CONFIG_USB_DC_STM32
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
#endif /* CONFIG_USB_DC_STM32 */
|
||||
{STM32_PIN_PA11, STM32F3_PINMUX_FUNC_PA11_USB_DM},
|
||||
{STM32_PIN_PA12, STM32F3_PINMUX_FUNC_PA12_USB_DP},
|
||||
#endif /* CONFIG_USB_DC_STM32 */
|
||||
#if DT_NODE_HAS_STATUS(DT_NODELABEL(can1), okay) && CONFIG_CAN
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
{STM32_PIN_PD0, STM32F3_PINMUX_FUNC_PD0_CAN1_RX},
|
||||
{STM32_PIN_PD1, STM32F3_PINMUX_FUNC_PD1_CAN1_TX},
|
||||
#endif
|
||||
};
|
||||
|
||||
static int pinmux_stm32_init(struct device *port)
|
||||
{
|
||||
ARG_UNUSED(port);
|
||||
static int pinmux_stm32_init(struct device *port) {
|
||||
ARG_UNUSED(port);
|
||||
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
|
||||
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
|
||||
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
|
||||
|
||||
Reference in New Issue
Block a user